Add a new bit that ImmLeaf's can opt into, which allows them to duck out of the generated FastISel.  X86 doesn't need to generate code to match ADD16ri8  since ADD16ri will do just fine.  This is a small codesize win in the generated instruction selector.
Add a new bit that ImmLeaf's can opt into, which allows them to duck out of
the generated FastISel.  X86 doesn't need to generate code to match ADD16ri8 
since ADD16ri will do just fine.  This is a small codesize win in the generated
instruction selector.


git-svn-id: a4a6f32337ebd29ad4763b423022f00f68d1c7b7@129692 91177308-0d34-0410-b5e6-96231b3b80d8

lodyagin/bare_cxx,lodyagin/bare_cxx,lodyagin/bare_cxx,lodyagin/bare_cxx,lodyagin/bare_cxx