core/armv7: clear 4th arg of secondary boot cores nonsecure entry
core/armv7: clear 4th arg of secondary boot cores nonsecure entry

Secondary boot cores shall clean cpu register R4 before leaving secure.
R4 is the 4th argument propagated to non-secure entry by optee monitor.

Signed-off-by: Etienne Carriere <f21bc5b8f3ea1962eb45af359f1abea6578cab94@linaro.org>
Reviewed-by: Jens Wiklander <7706914404370d7502c27a0eff493dcf491feb51@linaro.org>
Reviewed-by: Joakim Bech <741f90e2a7f4d9afbad8bd50be20560f4cf38962@linaro.org>

pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os,pascal-brand-st-dev/optee_os