MFC rev. 1.246: Fix an unaligned I/O memory access in the event that a SCB times out. The FXP_SCR_FLOWCONTROL registers is at offset 0x19, but 2 bytes wide. It cannot be read as a word without causing a panic on architectures that enforce strict alignment.
MFC rev. 1.246:
Fix an unaligned I/O memory access in the event that a SCB times out.
The FXP_SCR_FLOWCONTROL registers is at offset 0x19, but 2 bytes wide.
It cannot be read as a word without causing a panic on architectures
that enforce strict alignment.

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