 - Optimize the amd64 cpu_switch() TD_LOCK blocking and releasing to    require fewer blocking loops.  - Don't use atomic ops with 4BSD or on UP.  - Only use the blocking loop if ULE is compiled in.  - Use the correct memory barrier.
 - Optimize the amd64 cpu_switch() TD_LOCK blocking and releasing to
   require fewer blocking loops.
 - Don't use atomic ops with 4BSD or on UP.
 - Only use the blocking loop if ULE is compiled in.
 - Use the correct memory barrier.

Discussed with:	attilio, jhb, ssouhlal
Tested by:	current@
Approved by:	re

jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase,jrobhoward/SCADAbase