/* mbed Microcontroller Library - cmsis_nvic
 * Copyright (c) 2009-2011 ARM Limited. All rights reserved.
 *
 * CMSIS-style functionality to support dynamic vectors
 */

#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H

#include <stdint.h>

#define NVIC_NUM_VECTORS      (16 + 81)   // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET  16

#include "stm32f429xx.h"

#ifdef __cplusplus
extern "C" {
#endif

void NVIC_Relocate(void);
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);

#ifdef __cplusplus
}
#endif

#endif

/* mbed Microcontroller Library - cmsis_nvic
 * Copyright (c) 2009-2011 ARM Limited. All rights reserved.
 *
 * CMSIS-style functionality to support dynamic vectors
 */

#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H

#include <stdint.h>

#define NVIC_NUM_VECTORS      (16 + 91)   // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET  16

#include "stm32f429xx.h"

#ifdef __cplusplus
extern "C" {
#endif

void NVIC_Relocate(void);
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);

#ifdef __cplusplus
}
#endif

#endif

Fix nvic vectors number to 16 + 91
bsp/stm32f429: Fix nvic vectors number to 16 + 91

From st datasheet page 24:

    The devices embed a nested vectored interrupt controller
    able to manage 16 priority levels, and handle up to 91
    maskable interrupt channels plus the 16 interrupt lines
    of the Cortex®-M4 with FPU core.
