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For implementation details, visit our GitHub repository: [VeriReason](https://github.com/NellyW8/VeriReason)
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## Update Log
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2025.05.17: Initial release of VeriReason-Qwen2.5-3B-Verilog-RTL-GRPO-reasoning-tb
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```
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## Citation
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## Acknowledgement
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This repo benefits from OpenR1 and LLamaFactory.
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For implementation details, visit our GitHub repository: [VeriReason](https://github.com/NellyW8/VeriReason)
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Check out our paper: [VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation](https://arxiv.org/abs/2505.11849)
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## Update Log
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2025.05.17: Initial release of VeriReason-Qwen2.5-3B-Verilog-RTL-GRPO-reasoning-tb
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```
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## Citation
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Please cite our paper if you use our model or dataset:
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```bibtex
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@misc{wang2025verireasonreinforcementlearningtestbench,
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title={VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation},
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author={Yiting Wang and Guoheng Sun and Wanghao Ye and Gang Qu and Ang Li},
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year={2025},
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eprint={2505.11849},
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archivePrefix={arXiv},
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primaryClass={cs.AI},
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url={https://arxiv.org/abs/2505.11849},
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}
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```
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## Acknowledgement
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This repo benefits from OpenR1 and LLamaFactory.
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